Application of CMOS circuits have been quickly developed along with the development of integrated circuit techniques, and there has been continuous efforts for making the whole system as one chip.
Advantages of CMOS circuits are: they have a high packing density, and they can be easily designed for short time. These advantages have had many contributions to the development of the CMOS VLSI circuit's design and their implementation.
However, there is a problem in spite of the many advantages. This problem appears in the driving capability of the CMOS. A CMOS device has a far lower driving capability than a biploar transistor(BJT). This is why the ratio of the input voltage to the output current of a BJT device is an exponential, whereas the ratio of input voltage to output current of CMOS device is linear. The ratio of input voltage to output current of each device is as follows. bipolar transistor (BJT:NPN type): EQU Ic=I.sub.CBO .multidot.[e.sup.(V.sbsp.BE.sup./V.sbsp.T.sup.) 31 1]
field effect transistor (MOS:NMOS): ##EQU1##
Where, Ic is a collector current in the NPN bipolar transistor, I.sub.CBO is a reverse saturation current when the base of the transistor is open, and V.sub.BE is an applied voltage between the base and the emitter of the transistor.
Also, ##EQU2## where, k is Bolzman constant, T is an absolute temperature, and q is the amount of electric charge. I.sub.DS is the current between the drain and the source in a N channel MOS transistor, Kp is the input/output transfer conductance per unit, V.sub.GS is the applied voltage between the gate and the source in a NMOS transistor, and V.sub.T.sbsb.n is the threshold voltage of the transistor.
A large increase or decrease in the output current is made by a minute change in the input voltage, as it is known from the above equations, because the bipolar transistor has a property that the ratio of input/output voltage to collector current is an exponential function. Therefore, although the resistance of a load on the output terminal is very small, but it has the ability to drive a current. The input voltage of MOS transistor has to be very large when resistance of a load on the output terminal is small, because the MOS transistor has a property that the ratio of the input/output voltage-current characteristics is linear. Therefore, a MOS transistor has less ability to drive a circuit with a large load than a biploar transistor.
Another important problem is to integrate a system into one chip, which is increasing according to the increase of a CMOS circuit's application field. In other words, there is an interface problem between the inside circuit of a chip and the outside circuit, this problem is how to drive a large load of the outside circuit. This problem occurrs in an analog circuit as well as in a digital circuit. There is a need to have buffers for driving a circuit with a large load (i.e. resistors with small resistance, or capacitors with a very large capacitance). Up to now, a buffer using a push-pull structure was generally used for satisfying this demand.
FIG. 1 is a diagram illustrating a push-pull circuit according to the prior art.
The push-pull circuit consists of two transistors NI and P1. Reference numeral N1 is a NMOS transistor and acts as a pull up device, which pulls up the same output signal as the input signal, when its input signal increases to positive. P1 is a PMOS transistor and acts as a pull down device, which pulls down the same output signal as the input signal, when its input signal decreases to negative.
An illustration about the on/off states of the two transistors will be described in accordance with the operation flows.
If the input signal increases, N1 becomes on, and P1 becomes off. Also, if the input signal decreases, N1 becomes off, and P1 becomes on and pulls down the output signal.
If the input signal increases, and if the output load is large, the current to the output must become large, so that the voltage between the gate and the source must increase largely.
However, an increase of voltage between the gate and the source makes the performance of the buffer limited. The voltage between the gate and the source is determined by the input/output transfer characteristics of the MOS transistor. It is determined by the NMOS transistor in the case of a pull-up and is determined by the PMOS transistor in the case of a pull-down. Generally, the size of NMOS transistor is two or three times that of PMOS transistor (mobility of holes which are majority carriers of a PMOS transistor is less than that of electrons which are majority carriers of NMOS transistor). Therefore, the size of the PMOS transistor will have to be enlarged, in order that the transfer characteristics in pull-up is the same as that in a pull-down, i.e., in order that the driving capability-of a NMOS transistor is the same as that of a PMOS transistor. Then, there are some problems in that the size of the whole system circuit is enlarged, and the parasitic capacitance of the input stage is enlarged, so that its performance level goes down.